Advanced Digital Logic

CT Score

1500

#0 of 0 in CE

Difficulty

—/10

Workload

—h/wk

Median grade

from grade distribution

Would take again

—

n = 0 verified

ESTIMATEStarted from public course data. The first verified student reviews replace these numbers.

Grade distribution

Student-reported · course feedback surveys

61.7%

17.2%

3.1%

8.4%

4.4%

2.6%

1.8%

0.9%

A-

B+

B-

C+

By professor: same course, different game

PROFESSORSCOREGRADEHRS/WKTERMS

Sections

No section data for this term yet.

In the tree

EE 3320 or equivalent and background in VHDL/Verilog.→CE 6301→unlocks 2 courses

2 mapped courses list CE 6301 as a prerequisite. See on the map →

Study groups

0 active

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